1. Field of the Invention
The present invention relates generally to the field of signal sampling. More specifically, the present invention discloses a method and apparatus to address a problem known as "aliasing" commonly found in low frequency signal sampling (e.g. in digital oscilloscopes) in which the digitized output signal bears no real relationship to the actual input signal.
2. Statement of the Problem
FIG. 2 shows a block diagram of a typical oversample digitization architecture found in any of number of applications, including many existing digital oscilloscopes. The master clock 10 generates a clock frequency of F.sub.o. This signal is connected to the clock input of an analog-to-digital converter ("A/D") 12. The analog input signal, A.sub.i, is therefore digitized at a sample rate of F.sub.o samples per second, determined by the frequency of the master clock 10. However, only a fraction of these samples are to be stored into the memory 16. To accomplish this, a "Divide By N" block 14 is inserted between master clock 10 and the memory 16. Therefore, samples are stored into the memory 16 at a rate of 1/Nth of the master clock frequency. For example, FIG. 3 demonstrates sampling with N = 100, which results in every 100th sample (i.e. samples S.sub.0, S.sub.100, S.sub.200, etc.) being stored in the memory 16. FIG. 5 shows another version of the prior art in which N = 4.
Unfortunately, when using this prior art approach, signal aliasing can easily occur, especially when the effective store frequency is relatively near a harmonic of the input frequency. For example, consider the following:
Master Clock Frequency = F.sub.o =10.sup.6 samples/sec. PA1 Store Freq. = 10000 samples/sec. (N = 100) PA1 Input Signal = A sine wave whose frequency differs from the store frequency by 0.1%. (e.g. 10 KHz + 10 Hz, or 10,010 Hz).
In other words, A.sub.i = sin((10,010 * 2 * pi * t). The signal stored into memory is A.sub.i evaluated at time 0, 1/10000 sec., 2/10000 sec., 3/10000 sec., etc. This reduces to sin(10*2*pi*t), which is a sine wave having a frequency of 10 Hz, not 10.01 KHz- This condition is commonly known as aliasing--when the digitized output signal bears no real relationship to the actual input signal. Such a condition could have catastrophic consequences, especially in a digital feedback loop. One possible solution would be to add circuitry to bandwidth limit the input signal below the Nyquist limit (as calculated from the effective store frequency) before it is digitized. Unfortunately, this introduces undesirable added complexity and cost. Worse yet, this approach may also cause erroneous output signals. For example, in digital oscilloscopes, it would be quite unacceptable to bandwidth limit the input signal (e.g. to 1 KHz) at the slowest sweep speeds. This would result in higher frequency input signals (e.g. a 1 MHz input signal) being displayed simply as a DC input, which is certainly very far from accurate.